Capacitors are commonly used in filters for wireless communication. Capacitors with capacitances in the range of 0.5 to 10.0 pF are typically employed in radio frequency signal paths to set resonant frequencies of filters to specific values. Additionally, capacitors are typically employed in matching circuits to match impedances between components in wireless communication devices. A capacitor, in fact, is a fundamental component in electrical circuit design. As is well known in the art, capacitors can be found in many circuits throughout electronic industries and wherever electronic circuits are required.
Referring specifically to filters for use in wireless communication devices, related application Ser. No. 09/904,631, discloses a tunable capacitor that has been developed for tuning the resonant frequency of a filter for use at different frequencies. Tunability can be achieved by applying a variable bias electric field to a ferro-electric (FE) material located in the field induced by the capacitor. FE materials have a dielectric constant that varies with the bias electric field. As the dielectric constant varies, the capacitance of the capacitor varies. This changes the resonant frequency of the filter.
As disclosed in patent application Ser. No. 09/904,631, there are three basic types of capacitors in common use: gap capacitors, overlay capacitors and interdigital capacitors. Gap capacitors and interdigital capacitors are both planar structures. That is, both electrodes of the capacitors are in the same plane. Overlay capacitors have electrodes that are in different planes, that is, planes that overlay each other. Typically, overlay capacitors can develop higher capacitances, but they are harder to fabricate than planar capacitors. Thus, this invention is focused on improving the biasing scheme for planar capacitors. The discussion below is directed to gap capacitors, but it will be understood that the methods and devices described herein apply equally to all planar capacitors.
It has proven difficult to apply the variable electric field to the FE material in RF applications without introducing (1) increased loss, (2) circuit complexity or (3) circuit size, or a combination of these three. The variable electric field is applied by applying a variable DC voltage to the FE material. Typically, in a planar capacitor, FE material is placed between the electrodes of the capacitor and the substrate. Thus, the FE layer is formed on the substrate. The capacitor electrodes are formed on the FE layer, with a gap between the electrodes, forming the capacitor.
One way of applying the DC voltage is to connect the DC voltage source to an electrode of the capacitor through a resistor. Often, a DC blocking capacitor must be used in the RF signal path so as to provide an RF ground for example, to the FE capacitor without shorting out the DC bias applied. The DC blocking capacitor invariably introduces added loss into the RF signal. This increased loss results in a lower signal to noise ratio for receive applications, which results in dropped communications, and increased power consumption in transmit applications, among other things. Additionally, the resistor and the DC blocking capacitor add to the cost, size and complexity of the device that the capacitor is used in. Thus, this method of applying the variable DC electric filed to the FE material is not an optimal solution.
While planar FE capacitors are relatively simple to fabricate, they require a larger DC bias voltage to tune, as the gap dimensions are necessarily large (typically greater than or equal to 2.0 microns) due to conventional patterning constraints. Overlay FE capacitors, alternatively, can be tuned with a minimum DC voltage, as the plate separation can be made quite small (about 0.1 micron FE film thickness is possible and greater than about 0.25 microns is typical). Thus, the required DC bias field strength can be a factor of 20 to 40 times smaller for an overlay capacitor than for a gap capacitor. Furthermore, most all of the DC bias field is constrained within the FE film in an overlay capacitor. This is not true in a gap or interdigital capacitor, where a significant portion of the DC bias field is located outside of the FE film.
One significant problem with overlay capacitors is that they are more difficult to fabricate than gap capacitors, as they are multi-layer structures. They typically need a common bottom electrode on which the desired FE thin film is deposited. Ideally the desired metals for the bottom electrodes are typically the low loss noble metals like gold, silver or preferably copper. The deposition requirements for most FE films, however, would cause the unacceptable formation of metal oxides. To prevent unwanted oxidation, the deposition of a high refractory metal, such as platinum as a cap, or covering, layer is needed, which adds an extra mask or layer as well as increases cost. Additionally, the bottom layer metal thickness should be increased to greater than about 2.0 skin depths, to minimize the metal loss in the bottom electrode.
Rather than relying on overlay capacitors, a compromise solution is to introduce a pair of bias electrodes into the vicinity of the gap of a planar capacitor. One version would pattern one bias electrode in the gap itself and place the other electrode between the substrate and the FE layer. The variable DC electric field is applied to the FE material by putting bias electrodes in the form of doped silicon on both sides of the FE material. Thus, a first doped silicon layer is formed on the substrate. A FE layer is formed on the first doped silicon layer. The capacitor electrodes are formed on the FE layer. A second doped silicon layer is formed inside the gap region of the capacitor. The bias voltage is applied to the second doped silicon layer and the first doped silicon layer is grounded, or vice versa. This approach is not preferred, as it requires the presence of two bias electrodes, one above and one below the FE layer as well as the presence of a bias electrode between the two RF electrodes in the gap capacitor.
Further, the gap typically must be widened to make room for the bias electrode between the two RF (capacitor) electrodes. Widening the gap reduces the capacitance of the structure. To bring the capacitance back to a useful level, the capacitor must be made wider. This increases the size and cost of the capacitor. Additionally, it is difficult and costly to manufacture a gap capacitor with a conducting layer of doped silicon in the gap, since one must provide added grounding as well as bias for a two layer bias scheme.
Accordingly, it would be beneficial to have a tunable FE capacitor with a less complex, cheaper and smaller bias scheme for applying the variable DC electric field to the FE material in a planar tunable capacitor.
Variable capacitors using a variable DC voltage to tune the capacitance typically employ costly and overly large components to apply the variable DC voltage to the capacitor. Furthermore, at least one method of applying the variable DC voltage in the prior art introduces added signal loss into the RF signal path due to the need for a DC blocking capacitor.
Thus, it is an object of the present invention to provide methods and devices for applying a variable DC voltage to a tunable capacitor which introduce lower loss, lower cost and are smaller than those methods and devices previously available.
A bias electrode is positioned near a FE material. The capacitor electrodes are also positioned near the FE material, such that the capacitor electrodes and the bias electrode are not touching. There are only non-conductive materials, including possibly air, in the gap formed between the capacitor electrodes. The bias electrode is used to apply a variable DC voltage to the FE material. In a wide range of useful instances, one or both capacitor electrodes serve as a DC ground for producing a variable DC field between the bias electrode and the capacitor electrodes, thus eliminating the need for the extra DC blocking capacitor. Alternatively, one of the capacitor electrodes can be biased to, among other reasons, provide a modified capacitive response in that electrode. In other words, a single bias underlay electrode is added to a planar capacitor to achieve the biasing of the FE material. This allows for the elimination of biasing from either capacitor electrode. Alternatively, if bias is retained at either capacitor electrode, the underlay bias electrode allows for further biasing schemes.